Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study

D
DFT
2003
18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03)
Abstract - Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study

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	Similar Articles Articles by B. Nicolescu Articles by P. Peronnard Articles by R. Velazco Articles by Y. Savaria

18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03)

Boston, Massachusetts

November 03-November 05

ISBN: 0-7695-2042-1

	ASCII Text	x
	B. Nicolescu, P. Peronnard, R. Velazco, Y. Savaria, "Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study," Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on, pp. 377, 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003.

	BibTex	x
	@article{ 10.1109/DFTVS.2003.1250134, author = {B. Nicolescu and P. Peronnard and R. Velazco and Y. Savaria}, title = {Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study}, journal ={Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on}, volume = {0}, year = {2003}, issn = {1063-6722}, pages = {377}, doi = {http://doi.ieeecomputersociety.org/10.1109/DFTVS.2003.1250134}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on TI - Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study SN - 1063-6722 SP EP A1 - B. Nicolescu, A1 - P. Peronnard, A1 - R. Velazco, A1 - Y. Savaria, PY - 2003 KW - null VL - 0 JA - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on ER -

B. Nicolescu, TIMA Laboratory

P. Peronnard, TIMA Laboratory

R. Velazco, TIMA Laboratory

Y. Savaria, Ecole Polytechnique de Montr?al

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFTVS.2003.1250134

This paper characterizes the effectiveness of an error detection technique that addresses transient faults induced by the environment (radiation, EMC) in processor-based architectures. Experimental results obtained from fault injection sessions performed on two platforms built around a 32-bit digital signal processor and an 8-bit microcontroller, provide objective figures about the efficiency of the proposed approach.

Citation:

B. Nicolescu, P. Peronnard, R. Velazco, Y. Savaria, "Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study," dft, pp.377, 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003

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