Analysis and Testing of Analog and Mixed-Signal Circuits by an Operation-Region Model: A Case Study of Application and Implementation

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	Similar Articles Articles by Yukiya Miura Articles by Daisuke Kato

18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03)

Boston, Massachusetts

November 03-November 05

ISBN: 0-7695-2042-1

	ASCII Text	x
	Yukiya Miura, Daisuke Kato, "Analysis and Testing of Analog and Mixed-Signal Circuits by an Operation-Region Model: A Case Study of Application and Implementation," Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on, pp. 279, 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003.

	BibTex	x
	@article{ 10.1109/DFTVS.2003.1250122, author = {Yukiya Miura and Daisuke Kato}, title = {Analysis and Testing of Analog and Mixed-Signal Circuits by an Operation-Region Model: A Case Study of Application and Implementation}, journal ={Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on}, volume = {0}, year = {2003}, issn = {1063-6722}, pages = {279}, doi = {http://doi.ieeecomputersociety.org/10.1109/DFTVS.2003.1250122}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on TI - Analysis and Testing of Analog and Mixed-Signal Circuits by an Operation-Region Model: A Case Study of Application and Implementation SN - 1063-6722 SP EP A1 - Yukiya Miura, A1 - Daisuke Kato, PY - 2003 KW - null VL - 0 JA - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on ER -

Yukiya Miura, Tokyo Metropolitan University

Daisuke Kato, Tokyo Metropolitan University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFTVS.2003.1250122

We have developed an operation-region (OR) model for abstractly modeling the behavior of analog and mixed-signal circuits. The model is based on observing changes in the operation regions of MOS transistors. In this paper, we propose an analysis method for analog and mixed-signal circuits by applying the OR model and apply our method to test ITC'97 benchmark circuits. We also propose and verify a more efficient method of applying the OR model. To enhance the usability of the model, we try to implement it by using an X-Y curve method. This implementation maps transistor ORs to observable values and provides the capability to represent common conditions showing behaviors caused by many faults.

Citation:

Yukiya Miura, Daisuke Kato, "Analysis and Testing of Analog and Mixed-Signal Circuits by an Operation-Region Model: A Case Study of Application and Implementation," dft, pp.279, 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003

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