loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03)
Boston, Massachusetts
November 03-November 05
ISBN: 0-7695-2042-1
Xiao Liu, Virginia Tech
Michael S. Hsiao, Virginia Tech
In this paper, we propose a new concept of testing only functionally testable transition faults in Broadside Transition testing via a novel constrained ATPG. For each functionally untestable transition fault f, a set of illegal (unreachable) states that enable detection of f is first computed. This set of undesirable illegal states is efficiently represented as a Boolean formula. Our constrained ATPG then incorporates this constraint formula to generate Broadside vectors that avoid those undesirable states. In doing so, our method efficiently generates a test set for functionally testable transition faults and minimizes detection of functionally untestable transition faults. Because we want to avoid launching and propagating transitions in the circuit that are not possible in the functional mode, a direct bene.t of our method is the reduction of yield loss due to overtesting of these functionally untestable transitions.
Citation:
Xiao Liu, Michael S. Hsiao, "Constrained ATPG for Broadside Transition Testing," dft, pp.175, 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003
Usage of this product signifies your acceptance of the Terms of Use.