Delay faults are an increasingly important test challenge. Traditional delay fault models are incomplete in that they only model a subset of delay defect behaviors. To solve this problem a combined delay fault (CDF) model has been developed, which models delay faults caused by the combination of spot defects, parametric process variation, and capacitive coupling. The spot defects are modeled as both resistive opens and shorts. The CDF model has been implemented in the CodSim delay fault simulator which gives more realistic delay fault coverage. The fault coverage of traditional test sets has been evaluated on the ISCAS85 circuits.