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Second IEEE International Workshop on Electronic Design, Test and Applications
Synthesis of Dynamic Class Loading Specifications on Reconfigurable Hardware
Perth, Australia
January 28-January 30
ISBN: 0-7695-2081-2
Giampaolo Agosta, Politecnico di Milano, Italy
Francesco Bruschi, Politecnico di Milano, Italy
Donatella Sciuto, Politecnico di Milano, Italy
In the field of embedded systems design and specification, an emerging need is to be able to exploit the dynamical reconfigurability of electronic devices such as the FPGAs. These devices potentially offer the ability to extend or modify the functionality of a system during operation. The set of applications that would benefit from such a possibility is wide and includes signal and image processing, network devices, automotive systems. One of the main problems in exploiting such a possibility is the lack of a formalism that lets the designer model the reconfigurable behavior in high-level system representations and then to implement it on logic devices. Our work aims at investigating the potentiality of object oriented language features in the development of digital systems with dynamically reconfigurable components. In particular, we explore the implementation feasibility of the implementation of a set of reconfigurable functions of the system, starting from a high level representation based on the Java dynamic class loading semantics.
Citation:
Giampaolo Agosta, Francesco Bruschi, Donatella Sciuto, "Synthesis of Dynamic Class Loading Specifications on Reconfigurable Hardware," delta, pp.431, Second IEEE International Workshop on Electronic Design, Test and Applications, 2004
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