A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits

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Second IEEE International Workshop on Electronic Design, Test and Applications

Perth, Australia

January 28-January 30

ISBN: 0-7695-2081-2

	ASCII Text	x
	Daisuke Ezaki, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada, "A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits," Electronic Design, Test and Applications, IEEE International Workshop on, pp. 306, Second IEEE International Workshop on Electronic Design, Test and Applications, 2004.

	BibTex	x
	@article{ 10.1109/DELTA.2004.10022, author = {Daisuke Ezaki and Masaki Hashizume and Hiroyuki Yotsuyanagi and Takeomi Tamesada}, title = {A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits}, journal ={Electronic Design, Test and Applications, IEEE International Workshop on}, volume = {0}, year = {2004}, isbn = {0-7695-2081-2}, pages = {306}, doi = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2004.10022}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Electronic Design, Test and Applications, IEEE International Workshop on TI - A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits SN - 0-7695-2081-2 SP EP A1 - Daisuke Ezaki, A1 - Masaki Hashizume, A1 - Hiroyuki Yotsuyanagi, A1 - Takeomi Tamesada, PY - 2004 KW - null VL - 0 JA - Electronic Design, Test and Applications, IEEE International Workshop on ER -

Daisuke Ezaki, The Univ. of Tokushima

Masaki Hashizume, The Univ. of Tokushima

Hiroyuki Yotsuyanagi, The Univ. of Tokushima

Takeomi Tamesada, The Univ. of Tokushima

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2004.10022

In this paper, a power supply circuit is proposed for adiabatic dynamic CMOS logic circuit. Charge in load capacitors of gates can be recycled by using this power supply circuit. It leads to lower power consumption than without recycling. In this paper, source voltage of adiabatic dynamic CMOS inverter chain circuits is supplied with the circuit to evaluate the usefulness of the circuit. The results show that the circuits can work with smaller power consumption than without recycling.

Citation:

Daisuke Ezaki, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada, "A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits," delta, pp.306, Second IEEE International Workshop on Electronic Design, Test and Applications, 2004

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