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Second IEEE International Workshop on Electronic Design, Test and Applications
Practical Fault Coverage of Supply Current Tests for Bipolar ICs
Perth, Australia
January 28-January 30
ISBN: 0-7695-2081-2
Isao Tsukimoto, Takuma National College of Technology
Masaki Hashizume, The Univ. of Tokushima
Hiroyuki Yotsuyanagi, The Univ. of Tokushima
Takeomi Tamesada, The Univ. of Tokushima
Bipolar logic circuits are indispensable for implementing high-speed logic circuits. Since quiescent supply current flows into the circuits without faults, they can not be tested by a conventional IDDQ test method. We proposed a quiescent supply current test method which is applicable for the bipolar circuit tests, and examined the testability of open faults under an ideal assumption that there are not any process variations. Actually, there are some variations in the quiescent supply current of each gate in implemented logic circuits. Thus, It is necessary to examine the practical testability of the test method before applying to production tests of bipolar logic ICs. In this paper, the practical testability obtained under an assumption that there are some unit-to-unit variations of supply current among gates is examined for ISCAS-85 benchmark circuits. The experimental results show that larger fault coverage can be obtained with a smaller number of test input vectors by our supply current test method than the functional test one based on stuck-at fault models.
Citation:
Isao Tsukimoto, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada, "Practical Fault Coverage of Supply Current Tests for Bipolar ICs," delta, pp.189, Second IEEE International Workshop on Electronic Design, Test and Applications, 2004
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