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Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04)
DATE Panel: Chips of the Future: Soft, Crunchy or Hard?
Paris, France
February 16-February 20
ISBN: 0-7695-2085-5
Pierre G. Paulin, STMicroelectronics
Today's electronic products are composed of an increasingly diverse set of IC's, ranging from dedicated ASIC's, domain-specific ASSP's, platform FPGA's, to general-purpose FPGA's. With increasing integration, a mix of different fabrics on a single SoC becomes possible, combining ASIC-style standard cells, embedded FPGA's, mask-programmable sea-of-gates, and programmable processors. The panelists will present their vision of the fabric which will dominate SoC's in 90nm technologies and beyond, based on industrial trends and case studies. They will also outline the key CAD tool challenges for the chosen fabric.
Citation:
Pierre G. Paulin, "DATE Panel: Chips of the Future: Soft, Crunchy or Hard?," date, vol. 2, pp.20844, Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04), 2004
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