loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04)
Crosstalk Minimization in Logic Synthesis for PLA
Paris, France
February 16-February 20
ISBN: 0-7695-2085-5
Yi-Yu Liu, Tsing Hua University
Kuo-Hua Wang, Fu Jen Catholic University
TingTing Hwang, Tsing Hua University
We propose a maximum crosstalk minimization algorithm taking logic synthesis into consideration for PLA structure. To minimize the crosstalk, technique of permuting wire is used which includes the following steps. First, product lines are partitioned into long set and short set, and then product lines in long set and short set are interleaved. By interleaving algorithm, an upper bound on the maximum coupling capacitance of the product lines can be derived. Then, we take advantage of crosstalk immunity of product lines in long set to further reduce the maximum crosstalk effect of the PLA. Finally, synthesis techniques such as local transformation and global transformation are taken into consideration to search for a better result. The experiments demonstrate that our algorithm can effectively minimize the maximum crosstalk effect of a circuit by 48% as compared with the original area-minimized PLA without crosstalk minimization.
Citation:
Yi-Yu Liu, Kuo-Hua Wang, TingTing Hwang, "Crosstalk Minimization in Logic Synthesis for PLA," date, vol. 2, pp.20790, Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04), 2004
Usage of this product signifies your acceptance of the Terms of Use.