Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04) Paris, France February 16-February 20 ISBN: 0-7695-2085-5
In this paper, we present a tool to analyse photonic devices that can be used to realize basic building blocks of an optical network-on-chip (ONoC). Co-design between electrical tools and optical tools is possible. The VHDL-AMS language has been used to implement behavioral models of photonic devices. For low-level simulation, a gateway between an optical simulator, based on the finite elements method, and a typical EDA layout editor has been realized.
Citation:
M. Brière, L. Carrel, T. Michalke, F. Mieyeville, I. O?Connor, F. Gaffiot, "Design and Behavioral Modeling Tools for Optical Network-on-Chip," date, vol. 1, pp.10738, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||