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Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04)
Paris, France
February 16-February 20
ISBN: 0-7695-2085-5
ASCII Text
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Johann Laurent, Nathalie Julien, Eric Senn, Eric Martin, "Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors," Design, Automation and Test in Europe Conference and Exhibition, vol. 1, pp. 10666, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004.
 
 
BibTex
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@article{ 10.1109/DATE.2004.1268921,
author = {Johann Laurent and Nathalie Julien and Eric Senn and Eric Martin},
title = {Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {1},
year = {2004},
issn = {1530-1591},
pages = {10666},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268921},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors
SN - 1530-1591
SP
EP
A1 - Johann Laurent,
A1 - Nathalie Julien,
A1 - Eric Senn,
A1 - Eric Martin,
PY - 2004
KW - null
VL - 1
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Johann Laurent, South Brittany University
Nathalie Julien, South Brittany University
Eric Senn, South Brittany University
Eric Martin, South Brittany University
A high-level consumption estimation methodology and its associated tool, SoftExplorer, are presented. The estimation methodology uses a functional modeling of the processor combined with a parametric model to allow the designer to estimate the power consumption when the embedded software is executed on the target. SoftExplorer uses as input the assembly code generated by the compiler; its efficiency is compared to SimplePower?s approach. Results for different processors (TI C62, C67, C55 and ARM7) and for several DSP applications provide an average error less than 5%.
Citation:
Johann Laurent, Nathalie Julien, Eric Senn, Eric Martin, "Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors," date, vol. 1, pp.10666, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004
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