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Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04)
A System Level Exploration Platform and Methodology for Network Applications Based on Configurable Processors
Paris, France
February 16-February 20
ISBN: 0-7695-2085-5
D. Quinn, ?cole Polytechnique de Montr?al
B. Lavigueur, ?cole Polytechnique de Montr?al
G. Bois, ?cole Polytechnique de Montr?al
M. Aboulhamid, Universit? de Montr?al
A recent practice in the development of programmable SoC is the integration of configurable processors, since they offer an interesting compromise between purely software and hardware solutions. This paper proposes an adjustment to the current codesign approach to integrate this opportunity at the partitioning level. Since configurable processors seem to be an interesting option for NPU designs, we integrated into a system level exploration platform the support of an Xtensa processor for more investigation. As case studies, this paper illustrates the methodology for two realistic network-processing applications, for which interesting performances are obtained.
Citation:
D. Quinn, B. Lavigueur, G. Bois, M. Aboulhamid, "A System Level Exploration Platform and Methodology for Network Applications Based on Configurable Processors," date, vol. 1, pp.10364, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004
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