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Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum)
Estimation of Bus Performance for a Tuplespace in an Embedded Architecture
Munich, Germany
March 03-March 07
ISBN: 0-7695-1870-2
ASCII Text
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Nicola Drago, Franco Fummi, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino, "Estimation of Bus Performance for a Tuplespace in an Embedded Architecture," Design, Automation and Test in Europe Conference and Exhibition, vol. 2, pp. 20188, Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum), 2003.
 
 
BibTex
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@article{ 10.1109/DATE.2003.1186693,
author = {Nicola Drago and Franco Fummi and Marco Monguzzi and Giovanni Perbellini and Massimo Poncino},
title = {Estimation of Bus Performance for a Tuplespace in an Embedded Architecture},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {2},
year = {2003},
issn = {1530-1591},
pages = {20188},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2003.1186693},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Estimation of Bus Performance for a Tuplespace in an Embedded Architecture
SN - 1530-1591
SP
EP
A1 - Nicola Drago,
A1 - Franco Fummi,
A1 - Marco Monguzzi,
A1 - Giovanni Perbellini,
A1 - Massimo Poncino,
PY - 2003
KW - null
VL - 2
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Nicola Drago, Università di Verona
Franco Fummi, Università di Verona
Marco Monguzzi, Sitek S.p.A.
Giovanni Perbellini, Scientific Parc Verona
Massimo Poncino, Università di Verona

This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristics of typical embedded architectures for factory automation.

We describe the features of a bus for embedded applications and the problem of estimating its performance, and present a rapid prototyping design methodology developed for a qualitative and quantitative estimation. The methodology is based on a mix of different modeling languages such as Java, C++, SystemC and Network Simulator2 (NS2). Its application allows to estimate the expected performance of the bus under design in relation to the developed tuplespace.

Citation:
Nicola Drago, Franco Fummi, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino, "Estimation of Bus Performance for a Tuplespace in an Embedded Architecture," date, vol. 2, pp.20188, Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum), 2003
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