loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum)
Lightweight Implementation of the POSIX Threads API for an On-Chip MIPS Multiprocessor with VCI Interconnect
Munich, Germany
March 03-March 07
ISBN: 0-7695-1870-2
ASCII Text
x 
 
Frédéric Pétrot, Pascal Gomez, "Lightweight Implementation of the POSIX Threads API for an On-Chip MIPS Multiprocessor with VCI Interconnect," Design, Automation and Test in Europe Conference and Exhibition, vol. 2, pp. 20051, Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum), 2003.
 
 
BibTex
x
 
@article{ 10.1109/DATE.2003.10218,
author = {Frédéric Pétrot and Pascal Gomez},
title = {Lightweight Implementation of the POSIX Threads API for an On-Chip MIPS Multiprocessor with VCI Interconnect},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {2},
year = {2003},
issn = {1530-1591},
pages = {20051},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2003.10218},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Lightweight Implementation of the POSIX Threads API for an On-Chip MIPS Multiprocessor with VCI Interconnect
SN - 1530-1591
SP
EP
A1 - Frédéric Pétrot,
A1 - Pascal Gomez,
PY - 2003
KW - null
VL - 2
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Frédéric Pétrot, Universit? Pierre et Marie Curie
Pascal Gomez, Universit? Pierre et Marie Curie
This paper relates our experience in designing from scratch a multi-threaded kernel for a MIPS R3000 on-chip multiprocessor. We briefly present the target architecture build around a VCI compliant interconnect, and the CPU characteristics. Then we focus on the implementation of part of the POSIX 1003.1b and 1003.1c standards. We conclude this case study by simulation results obtained by cycle true simulation of an MJPEG video decoder application on the multiprocessor, using several scheduler organizations and architectural parameters.
Citation:
Frédéric Pétrot, Pascal Gomez, "Lightweight Implementation of the POSIX Threads API for an On-Chip MIPS Multiprocessor with VCI Interconnect," date, vol. 2, pp.20051, Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum), 2003
Usage of this product signifies your acceptance of the Terms of Use.