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Design, Automation and Test in Europe Conference and Exhibition (DATE'03)
Munich, Germany
March 03-March 07
ISBN: 0-7695-1870-2
P. Op de Beeck, IMEC and Katholieke Universiteit Leuven
C. Ghez, IMEC
M. Miranda, IMEC
F. Catthoor, IMEC and Katholieke Universiteit Leuven
G. Deconinck, Katholieke Universiteit Leuven
In this work we illustrates the strong interaction between the data organisation in background memory and the data format required for sub-word level acceleration. The impact of such interaction is demonstrated on the implementation of a Digital Audio Broadcast Channel Decoder on a TriMedia processor, where data format transformations applied on the background memory data enable a substantially better exploitation of the available Single Instruction Multiple Data instructions. As a result, a factor two reduction for both execution time and data memory energy is achieved.
Citation:
P. Op de Beeck, C. Ghez, E. Brockmeyer, M. Miranda, F. Catthoor, G. Deconinck, "Background Data Organisation for the Low-Power Implementation in Real-Time of a Digital Audio Broadcast Receiver on a SIMD Processor," date, vol. 1, pp.11144, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003
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