Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath designs is the full-custom design method targeted to bit-sliced or bit-alignment layout architectures. Using this approach, designers can fully exploit design properties, such as various circuit designs, structural regularities and layout structures, to develop high-speed, low-power and high-density datapath designs. However, the main drawbacks of this approach are threefold: (1) extremely high development cost, (2) very long development time, and (3) difficult to migrate the custom design to a new technology.

The other approach is the HDL-based synthesis method targeted to the standard-cell layout architecture. This approach is highly productive and easy to implement. However, due to lack of the ability to exploit the regularity properties of datapath designs, it?s mostly suitable to produce low/medium-speed datapath designs. Another design method targeted to mixed standard-and custom-cells is carried out as follows. First, it generates a standard-cell design to obtain a maximal achievable speed. Second, it performs a cell customization process to determine which standard cells need to be customized in order to satisfy the given timing constraint. This cell customization process is usually performed incrementally based on designers? intuitions and experiences. Once designers select a set of standard cells to be customized, they will define the specification of the custom cells and develop the cells accordingly. Finally, the designers will replace the standard cells with the custom ones and re-evaluate the speed of the design. The customization process will continue until the timing constraint is satisfied.

In this paper, we present a custom-cell identification method for high-speed datapath-oriented designs. The proposed method uses an HDL-based standard-cell design flow by integrating a custom-cell identification algorithm to determine a minimal-cost cell set and the design budgets for cell customization. Experimental results on a set of benchmarking designs are reported to demonstrate the effectiveness of the proposed method. Note that our problem is different from the cell-sizing problem. While the cell-sizing problem is to select and to replace (re-size) cells (instances of cells in cell library) one by one, our problem is to select and re-design cells in the cell library and to replace all instances of the cell in the design at one time.