Design, Automation and Test in Europe Conference and Exhibition (DATE'03) Munich, Germany March 03-March 07 ISBN: 0-7695-1870-2
We present a visualization tool called PLFire, which allows a user to observe the behavior of a Phased Logic (PL) circuit. Phased logic is a technique for realizing self-timed circuitry that is delay-insensitive and requires no global clock. One advantage of self-timed circuits is that throughput is based on average propagation delays and not worst-case delay. By being able to visualize the operation of a PL circuit, including the token flow, a designer gets a better understanding of what features of a design have the greatest impact on performance.
Citation:
K. Fazel, M. A. Thornton, R. B. Reese, "PLFire: A Visualization Tool for Asynchronous Phased Logic Designs," date, vol. 1, pp.11096, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||