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Design, Automation and Test in Europe Conference and Exhibition (DATE'03)
A P1500-Compatible Programmable BIST Aapproach for the Test of Embedded Flash Memories
Munich, Germany
March 03-March 07
ISBN: 0-7695-1870-2
P. Bernardi, Politecnico di Torino
M. Rebaudengo, Politecnico di Torino
M. Sonza Reorda, Politecnico di Torino
M. Violante, Politecnico di Torino
In this paper we present a microprocessor-based approach suitable for embedded flash memory testing in a System-on-a-chip (SOC) environment. The main novelty of the approach is the high flexibility, which guarantees easy exploitation of the same architecture to different memory cores. The proposed approach is compatible with the P1500 standard. A case study has been developed and demonstrates the advantages of the proposed core test strategy in terms of area overhead and test application time.
Citation:
P. Bernardi, M. Rebaudengo, M. Sonza Reorda, M. Violante, "A P1500-Compatible Programmable BIST Aapproach for the Test of Embedded Flash Memories," date, vol. 1, pp.10720, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003
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