Design, Automation and Test in Europe Conference and Exhibition (DATE'03)
Design and Analysis of a Programmable Single-Chip Architecture for DVB-T Base-Band Receiver
Munich, Germany
March 03-March 07
ISBN: 0-7695-1870-2
This work treats the design and analysis of a programmable (or reconfigurable) DSP-domain-specific architecture called MorphoSys, upon which world?s first single-chip software solution for DVB-T base-band receiver can be implemented. Based on the first version of MorphoSys, many modifications have been made to improve greatly both computation power and data movement efficiency. Sequential codes and SIMD codes can be parallelized; temporal granularity adjustment boosts up performance up to 4 times; numerous different types of data movement can be accelerated 8 to 64 times faster than sequential movement. As a complicated (21GOPS) and typical communication system, DVB-T base-band receiver is designed with low performance loss and mapped onto MorphoSys architecture (>28GOPS). This solidly contributes to the software defined radio development.
Citation:
Chengzhi Pan, Nader Bagherzadeh, Amir Hosein Kamalizad, Arezou Koohi, "Design and Analysis of a Programmable Single-Chip Architecture for DVB-T Base-Band Receiver," date, vol. 1, pp.10468, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003