S. Pilarski, G. Hu, "Speeding up SAT for EDA," Design, Automation and Test in Europe Conference and Exhibition, pp. 1081, 2002 Design, Automation and Test in Europe Conference and Exhibition (DATE'02), 2002.

@article{ 10.1109/DATE.2002.998437,
author = {S. Pilarski and G. Hu},
title = {Speeding up SAT for EDA},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {0},
year = {2002},
isbn = {0-7695-1471-5},
pages = {1081},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2002.998437},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Speeding up SAT for EDA
SN - 0-7695-1471-5
SP
EP
A1 - S. Pilarski,
A1 - G. Hu,
PY - 2002
VL - 0
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -