2002 Design, Automation and Test in Europe Conference and Exhibition (DATE'02) Macromodeling of Digital I/O Ports for System EMC Assessment Paris, France March 04-March 08 ISBN: 0-7695-1471-5
This paper addresses the development of accurate and efficient behavioral models of digital integrated circuit input and output ports for EMC and signal integrity simulations. A practical modeling process is proposed and applied to some example devices. The modeling process is simple and efficient, and it yields models performing at a very high accuracy level.
Citation:
I. Stievano, F. Canavero, I. Maio, Z. Chen, D. Becker, G. Katopis, "Macromodeling of Digital I/O Ports for System EMC Assessment," date, pp.1044, 2002 Design, Automation and Test in Europe Conference and Exhibition (DATE'02), 2002 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||