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Design, Automation and Test in Europe (DATE '00)
Retargeting of Compiled Simulators for Digital Signal Processors Using a Machine Description Language
Paris, France
March 27-March 30
ISBN: 0-7695-0537-6
Stefan Pees, RWTH Aachen
Andreas Hoffmann, RWTH Aachen
Heinrich Meyr, RWTH Aachen
This paper presents a methodology to retarget the technique of compiled simulation for Digital Signal Processors (DSPs) using the modeling language LISA. In the past, the principle of compiled simulation as means for speeding up simulators has only been implemented for specific DSP architectures. The new approach presented here discusses methods of integrating compiled simulation techniques to retargetable simulation tools. The principle and the implementation are discussed in this paper and results for the TI TMS320C6201 DSP are presented.
Citation:
Stefan Pees, Andreas Hoffmann, Heinrich Meyr, "Retargeting of Compiled Simulators for Digital Signal Processors Using a Machine Description Language," date, pp.669, Design, Automation and Test in Europe (DATE '00), 2000
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