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Design, Automation and Test in Europe (DATE '00)
Static Timing Analysis of Embedded Software on Advanced Processor Architectures
Paris, France
March 27-March 30
ISBN: 0-7695-0537-6
ASCII Text
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A. Hergenhan, W. Rosenstiel, "Static Timing Analysis of Embedded Software on Advanced Processor Architectures," Design, Automation and Test in Europe Conference and Exhibition, pp. 552, Design, Automation and Test in Europe (DATE '00), 2000.
 
 
BibTex
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@article{ 10.1109/DATE.2000.840840,
author = {A. Hergenhan and W. Rosenstiel},
title = {Static Timing Analysis of Embedded Software on Advanced Processor Architectures},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {0},
year = {2000},
issn = {1530-1591},
pages = {552},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2000.840840},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Static Timing Analysis of Embedded Software on Advanced Processor Architectures
SN - 1530-1591
SP
EP
A1 - A. Hergenhan,
A1 - W. Rosenstiel,
PY - 2000
VL - 0
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
This paper examines several techniques for static timing analysis. In detail, the first part of the paper analyzes the connection of prediction accuracy (worst case execution time) and applicability of a methodology for modeling and analysis of instruction as well as data cache behavior. The second part of the paper proposes a timing analysis technique for super-scalar processors. The objects of our studies are two processors of the PowerPC family, in particular the PPC403 and the MPC750.
Citation:
A. Hergenhan, W. Rosenstiel, "Static Timing Analysis of Embedded Software on Advanced Processor Architectures," date, pp.552, Design, Automation and Test in Europe (DATE '00), 2000
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