Illegal State Space Identification for Sequential Circuit Test Generation

D
DATE
1999
Design, Automation and Test in Europe (DATE '99)
Abstract - Illegal State Space Identification for Sequential Circuit Test Generation

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Design, Automation and Test in Europe (DATE '99)

Munich, Germany

March 09-March 12

ISBN: 0-7695-0078-1

	ASCII Text	x
	M. Konijnenburg, J. Van der Linden, A. van de Goor, "Illegal State Space Identification for Sequential Circuit Test Generation," Design, Automation and Test in Europe Conference and Exhibition, pp. 741, Design, Automation and Test in Europe (DATE '99), 1999.

	BibTex	x
	@article{ 10.1109/DATE.1999.761213, author = {M. Konijnenburg and J. Van der Linden and A. van de Goor}, title = {Illegal State Space Identification for Sequential Circuit Test Generation}, journal ={Design, Automation and Test in Europe Conference and Exhibition}, volume = {0}, year = {1999}, issn = {1530-1591}, pages = {741}, doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.1999.761213}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Design, Automation and Test in Europe Conference and Exhibition TI - Illegal State Space Identification for Sequential Circuit Test Generation SN - 1530-1591 SP EP A1 - M. Konijnenburg, A1 - J. Van der Linden, A1 - A. van de Goor, PY - 1999 VL - 0 JA - Design, Automation and Test in Europe Conference and Exhibition ER -

M. Konijnenburg, Delft University of Technology

J. Van der Linden, Delft University of Technology

A. van de Goor, Delft University of Technology

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.1999.761213

Techniques and data-structures are proposed to expand the known Global Illegal State (GIS) space, in order to reduce the search space of sequential circuit test generation.The techniques use the known GISes to generate candidate GISes, which have to be proven unjustifiable. This improves STPG performance by reducing the number of stored GISes, while covering a larger part of the GIS space.

Citation:

M. Konijnenburg, J. Van der Linden, A. van de Goor, "Illegal State Space Identification for Sequential Circuit Test Generation," date, pp.741, Design, Automation and Test in Europe (DATE '99), 1999

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