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Design, Automation and Test in Europe (DATE '99)
Full Scan Fault Coverage With Partial Scan
Munich, Germany
March 09-March 12
ISBN: 0-7695-0078-1
ASCII Text
x 
 
Xijiang Lin, Irith Pomeranz, Sudhakar M. Reddy, "Full Scan Fault Coverage With Partial Scan," Design, Automation and Test in Europe Conference and Exhibition, pp. 468, Design, Automation and Test in Europe (DATE '99), 1999.
 
 
BibTex
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@article{ 10.1109/DATE.1999.761167,
author = {Xijiang Lin and Irith Pomeranz and Sudhakar M. Reddy},
title = {Full Scan Fault Coverage With Partial Scan},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {0},
year = {1999},
issn = {1530-1591},
pages = {468},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.1999.761167},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Full Scan Fault Coverage With Partial Scan
SN - 1530-1591
SP
EP
A1 - Xijiang Lin,
A1 - Irith Pomeranz,
A1 - Sudhakar M. Reddy,
PY - 1999
VL - 0
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Xijiang Lin, Mentor Graphics Corporation
Irith Pomeranz, University of Iowa
Sudhakar M. Reddy, University of Iowa
In this paper, a test generation based partial scan selec- tion procedure is proposed. The procedure is able to achieve the same level of fault coverage as in a full scan design by scanning only a subset of the ip- ops. New measures are used to guide the ip- op selection during the procedure. The proposed procedure is applied to the ISCAS-89 and the ADDENDUM-93 benchmark circuits. For all the circuits, it is possible to achieve the same fault coverage as that for full scan while scanning a portion of the ip- ops.
Citation:
Xijiang Lin, Irith Pomeranz, Sudhakar M. Reddy, "Full Scan Fault Coverage With Partial Scan," date, pp.468, Design, Automation and Test in Europe (DATE '99), 1999
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