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Design, Automation and Test in Europe (DATE '99)
Efficient Switching Activity Simulation under a Real Delay Model Using a Bitparallel Approach
Munich, Germany
March 09-March 12
ISBN: 0-7695-0078-1
M. Bühler, University of Stuttgart
M. Papesch, University of Stuttgart
K. Kapp, University of Stuttgart
U.G. Baitinger, University of Stuttgart
Estimating switching activity is a crucial step in optimiz ing circuits for low power. In this paper, a fast gate level switching activity estimator for combinational circuits will be presented. The combination of event driven and bitparallel simulation allows for high accuracy due to the real delay model of the former while maintaining the speedup of the latter. This is demonstrated by detailed experimental results.
Citation:
M. Bühler, M. Papesch, K. Kapp, U.G. Baitinger, "Efficient Switching Activity Simulation under a Real Delay Model Using a Bitparallel Approach," date, pp.459, Design, Automation and Test in Europe (DATE '99), 1999
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