Critical to the automation of analog circuit systems is the estimation process of performance parameters which are used to guide the topology selection and circuit sizing processes. This paper presents a methodology to improve the effectiveness of the CMOS analog system circuit synthesis search process by developing an Analog Performance Estimator (APE) tool. APE is capable of accepting the design parameters of an analog circuit and determine its performance parameters along with anticipated sizes of all the circuit elements. The APE is structured as a hierarchical estimation engine containing performance models of analog circuits at various levels of abstraction.