A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement

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	Similar Articles Articles by R. Cmar Articles by L. Rijnders Articles by P. Schaumont Articles by S. Vernalde Articles by I. Bolsens

Design, Automation and Test in Europe (DATE '99)

Munich, Germany

March 09-March 12

ISBN: 0-7695-0078-1

	ASCII Text	x
	R. Cmar, L. Rijnders, P. Schaumont, S. Vernalde, I. Bolsens, "A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement," Design, Automation and Test in Europe Conference and Exhibition, pp. 271, Design, Automation and Test in Europe (DATE '99), 1999.

	BibTex	x
	@article{ 10.1109/DATE.1999.761133, author = {R. Cmar and L. Rijnders and P. Schaumont and S. Vernalde and I. Bolsens}, title = {A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement}, journal ={Design, Automation and Test in Europe Conference and Exhibition}, volume = {0}, year = {1999}, issn = {1530-1591}, pages = {271}, doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.1999.761133}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Design, Automation and Test in Europe Conference and Exhibition TI - A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement SN - 1530-1591 SP EP A1 - R. Cmar, A1 - L. Rijnders, A1 - P. Schaumont, A1 - S. Vernalde, A1 - I. Bolsens, PY - 1999 VL - 0 JA - Design, Automation and Test in Europe Conference and Exhibition ER -

R. Cmar

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.1999.761133

Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fixed point precision, type refinement is needed. The paper presents a methodology and design environment for this quantization process.The method uses independent strategies for fixing MSB and LSB weights of a fixed point signal. It enables short design cycles by combining the strengths of both analytical and simulation based methods.

Citation:

R. Cmar, L. Rijnders, P. Schaumont, S. Vernalde, I. Bolsens, "A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement," date, pp.271, Design, Automation and Test in Europe (DATE '99), 1999

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