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Design, Automation and Test in Europe (DATE '99)
Parametric Fault Diagnosis for Analog Systems Using Functional Mapping 1
Munich, Germany
March 09-March 12
ISBN: 0-7695-0078-1
S. Cherubal, Georgia Institute of Technology
A. Chatterjee, Georgia Institute of Technology
We propose a new Simulation-After-Test (SAT) method-ology for accurate diagnosis of circuit parameters in large analog circuits. Our methodology is based on constructing a non-linear regression model using prior circuit simula-tion, which relates a set of measurements to the circuit's internal parameters. First, we give algorithms to select measurements that give all the diagnostic information about the Circuit-Under-Test (CUT). From these selected measurements, we solve for the internal parameters of the circuit using iterative numerical techniques. The method-ology has been applied to several mixed-signal test bench-mark circuits and has applications in process debugging for mixed-signal integrated circuits (ICs) as well trouble-shooting and repair of board level systems.
Citation:
S. Cherubal, A. Chatterjee, "Parametric Fault Diagnosis for Analog Systems Using Functional Mapping 1," date, pp.195, Design, Automation and Test in Europe (DATE '99), 1999
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