IDEA is a symmetric block cipher with a 128-bit key proposed to replace DES where a strong encryption is required. Many applications need speed of a hardware encryption implementation while trying to preserve flexibility and low cost of a software implementation. In this paper we have presented one solution of this problem. Our system architecture uses single core module named Round to implement IDEA algorithm. Using the core we were able to implement and test example application in only three days. This "of the shelf" solution for designing cryptographic application using IDEA algorithm significantly reduced design cycle, thus greatly reducing time-to-market and cost of such designs. By increasing the number of the round modules system designer can linearly increase speed of the design. This system design methodology makes it possible to achieve necessary performance, or to preserve area (and reduce costs) when needed unlike other known approaches. We have implemented one round UNICORN architecture in Xilinx FPGA. After implementation the chip has been tested using the standard test vectors and it was capable of performing 2.8Mbps encryption in both ECB and CBC mode.