Design Automation and Test in Europe (DATE '98)
Innovative System-level Design Environment Based on FORM for Transport Processing System
Paris, France
February 23-February 26
ISBN: 0-8186-8359-7
This paper presents a system-level design environment for data transport processing systems. In this environment, designers can easily verify system behavior by formally defining data structures and their related actions, without considering detailed timing. In addition, the verified specification can be translated into synthesizable RTL descriptions by a dedicated RTL generator. Thus, using lower-level EDA tools, actual hardware can be obtained directly from a system-level specification.
Index Terms:
Formal specification, System design, Transport processing system, RTL generation, Specification editor, System level simulation
Citation:
Kazushige Higuchi, Kazuhiro Shirakawa, "Innovative System-level Design Environment Based on FORM for Transport Processing System," date, pp.883, Design Automation and Test in Europe (DATE '98), 1998