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Design Automation and Test in Europe (DATE '98)
AFTA: A Formal Delay Model for Functional Timing Analysis
Paris, France
February 23-February 26
ISBN: 0-8186-8359-7
V. Chandramouli, EECS Department, The University of Michigan,
Jesse P. Whittemore, EECS Department, The University of Michigan,
Karem A. Sakallah, EECS Department, The University of Michigan,
Despite its importance, we find that a rigorous theoretical foundation for performing timing analysis has been lacking so far. As a result, we have initiated a research project that aims to provide such a foundation for functional timing analysis. As part of this work we have developed an abstract automaton based delay model that accounts for the various analog factors affecting delay, such as signals slopes, near simultaneous switching, etc., while at the same timweb accounting for circuit functionality. This paper presents this delay model
Index Terms:
delay model, timed-automamata, timing analysis, states, timers
Citation:
V. Chandramouli, Jesse P. Whittemore, Karem A. Sakallah, "AFTA: A Formal Delay Model for Functional Timing Analysis," date, pp.350, Design Automation and Test in Europe (DATE '98), 1998
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