loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Design Automation and Test in Europe (DATE '98)
The Design of an Asynchronous VHDL Synthesizer
Paris, France
February 23-February 26
ISBN: 0-8186-8359-7
Sun-Yen Tan, University of Manchester
Stephen B. Furber, University of Manchester
Wen-Fang Yen, National Taipei University of Technology
This paper presents a straightforward approach for synthesizing a standard VHDL description of an asynchronous circuit from a behavioral VHDL description. The asynchronous circuit style is based on "micropipelines", a style currently used to develop asynchronous microprocessors at Manchester University. The rules of partition and conversion which are used to implement the synthesizer are also described. The synthesizer greatly reduces the design time of a complex micropipeline circuit.
Index Terms:
Asynchronous, Synthesis, VHDL
Citation:
Sun-Yen Tan, Stephen B. Furber, Wen-Fang Yen, "The Design of an Asynchronous VHDL Synthesizer," date, pp.44, Design Automation and Test in Europe (DATE '98), 1998
Usage of this product signifies your acceptance of the Terms of Use.