13th Asian Test Symposium (ATS'04) A Measurement Unit for Input Signal Analysis of SRAM Sense Amplifier Kenting, Taiwan November 15-November 17 ISBN: 0-7695-2235-1
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2004.9
The voltage difference on bit line pairs is a critical parameter while designing Static Random Access Memory (SRAM). In this paper, measurement unit is presented for sampling and amplifying the weak signals of bit line pairs to higher voltage differential level. According to the measured result, the reliability analysis can be easily completed through curve fitting. The proposed circuit is designed and simulated with a 1K-bit SRAM by using a 0.18um 1P6M CMOS process. The measured results offer designers a meaningful clue to verify/strengthen their memory design.
Citation:
Yi-Ming Sheng, Ming-Jun Hsiao, Tsin-Yuan Chang, "A Measurement Unit for Input Signal Analysis of SRAM Sense Amplifier," ats, pp.272-276, 13th Asian Test Symposium (ATS'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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