Nonlinear CA Based Design of Test Set Generator Targeting Pseudo-Random Pattern Resistant Faults

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13th Asian Test Symposium (ATS'04)

Kenting, Taiwan

November 15-November 17

ISBN: 0-7695-2235-1

	ASCII Text	x
	Sukanta Das, Anirban Kundu, Biplad K. Sikdar, "Nonlinear CA Based Design of Test Set Generator Targeting Pseudo-Random Pattern Resistant Faults," Asian Test Symposium, pp. 196-201, 13th Asian Test Symposium (ATS'04), 2004.

	BibTex	x
	@article{ 10.1109/ATS.2004.62, author = {Sukanta Das and Anirban Kundu and Biplad K. Sikdar}, title = {Nonlinear CA Based Design of Test Set Generator Targeting Pseudo-Random Pattern Resistant Faults}, journal ={Asian Test Symposium}, volume = {0}, year = {2004}, issn = {1081-7735}, pages = {196-201}, doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2004.62}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asian Test Symposium TI - Nonlinear CA Based Design of Test Set Generator Targeting Pseudo-Random Pattern Resistant Faults SN - 1081-7735 SP196 EP201 A1 - Sukanta Das, A1 - Anirban Kundu, A1 - Biplad K. Sikdar, PY - 2004 KW - null VL - 0 JA - Asian Test Symposium ER -

Sukanta Das, Bengal Engineering College

Anirban Kundu, Bengal Engineering College

Biplad K. Sikdar, Bengal Engineering College

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2004.62

This paper reports the design of an efficient Test Set Generator (TSG) for VLSI circuit. It is built around the regular structure of Cellular Automata (CA) employing nonlinear CA rules and targets detection of hard-to-detect pseudo-random pattern resistant faults. The optimal design of TSG structure is achieved with the framework of SA (simulated Annealing) to ensure proper selection of CA rules for TSG cells. Efficiency of TSG in comparison to linear CA/LFSR based designs is validated through experimentation.

Citation:

Sukanta Das, Anirban Kundu, Biplad K. Sikdar, "Nonlinear CA Based Design of Test Set Generator Targeting Pseudo-Random Pattern Resistant Faults," ats, pp.196-201, 13th Asian Test Symposium (ATS'04), 2004

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