A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores

A
ATS
2003
12th Asian Test Symposium (ATS'03)
Abstract - A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores

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	Similar Articles Articles by Zhigang Jiang Articles by Sandeep K. Gupta

12th Asian Test Symposium (ATS'03)

Xi?an, China

November 16-November 19

ISBN: 0-7695-1951-2

	ASCII Text	x
	Zhigang Jiang, Sandeep K. Gupta, "A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores," Asian Test Symposium, pp. 278, 12th Asian Test Symposium (ATS'03), 2003.

	BibTex	x
	@article{ 10.1109/ATS.2003.1250823, author = {Zhigang Jiang and Sandeep K. Gupta}, title = {A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores}, journal ={Asian Test Symposium}, volume = {0}, year = {2003}, issn = {1081-7735}, pages = {278}, doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2003.1250823}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asian Test Symposium TI - A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores SN - 1081-7735 SP EP A1 - Zhigang Jiang, A1 - Sandeep K. Gupta, PY - 2003 KW - null VL - 0 JA - Asian Test Symposium ER -

Zhigang Jiang, University of Southern California

Sandeep K. Gupta, University of Southern California

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2003.1250823

In this paper we propose a hierarchical automatic test pattern generation (ATPG) framework that can generate custom tests for full-scan systems-on-chip (SOCs) containing intellectual property (IP) cores without revealing much IP. The proposed ATPG is shown to be correct and complete and its average and worst case complexities are shown to be comparable with those of classical ATPG. The proposed ATPG will reduce DFT overheads and test application costs. It will also enable utilization of a range of test methodologies at the SOC level.

Citation:

Zhigang Jiang, Sandeep K. Gupta, "A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores," ats, pp.278, 12th Asian Test Symposium (ATS'03), 2003

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