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12th Asian Test Symposium (ATS'03)
Delay Testing of MOS Transistor with Gate Oxide Short
Xi?an, China
November 16-November 19
ISBN: 0-7695-1951-2
M. Renovell, Universit? de Montpellier II
J.M. Galli?re, Universit? de Montpellier II
F. Aza?, Universit? de Montpellier II
Y. Bertrand, Universit? de Montpellier II
Gate Oxide Short defects are becoming predominant as technology is scaling down. Boolean and IDDQ testing of this defect has been widely studied but there is no paper dedicated to delay testing of this defect. So, this paper studies the delay behavior of Gate Oxide Short faults due to pinhole in the gate oxide. The objective of this paper is to give a detailed analysis of the behavior of the GOS defect taking into account the random parameter of the defect such as the GOS resistance and the GOS location. Because an accurate analysis is desired, the bi-dimensional array will be used. Because a complete analysis is desired, we derive characteristic of the GOS as a function of the GOS resistance and location.
Citation:
M. Renovell, J.M. Galli?re, F. Aza?, Y. Bertrand, "Delay Testing of MOS Transistor with Gate Oxide Short," ats, pp.168, 12th Asian Test Symposium (ATS'03), 2003
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