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12th Asian Test Symposium (ATS'03)
Issues Related to the Formulation of DFT Solution for Analog Circuit Test Using Equivalent Fault Analysis
Xi?an, China
November 16-November 19
ISBN: 0-7695-1951-2
ASCII Text
x 
 
Mike W. T. Wong, "Issues Related to the Formulation of DFT Solution for Analog Circuit Test Using Equivalent Fault Analysis," Asian Test Symposium, pp. 120, 12th Asian Test Symposium (ATS'03), 2003.
 
 
BibTex
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@article{ 10.1109/ATS.2003.1250795,
author = {Mike W. T. Wong},
title = {Issues Related to the Formulation of DFT Solution for Analog Circuit Test Using Equivalent Fault Analysis},
journal ={Asian Test Symposium},
volume = {0},
year = {2003},
issn = {1081-7735},
pages = {120},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2003.1250795},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asian Test Symposium
TI - Issues Related to the Formulation of DFT Solution for Analog Circuit Test Using Equivalent Fault Analysis
SN - 1081-7735
SP
EP
A1 - Mike W. T. Wong,
PY - 2003
KW - null
VL - 0
JA - Asian Test Symposium
ER -
 
Mike W. T. Wong, Hong Kong Polytechnic University
This paper identifies a few important points at which the application of equivalent fault analysis becomes the preferred choice in formulating DFT solution for analog circuit test.
Citation:
Mike W. T. Wong, "Issues Related to the Formulation of DFT Solution for Analog Circuit Test Using Equivalent Fault Analysis," ats, pp.120, 12th Asian Test Symposium (ATS'03), 2003
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