loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
12th Asian Test Symposium (ATS'03)
Implementation of Memory Tester Consisting of SRAM-Based Reconfigurable Cells
Xi?an, China
November 16-November 19
ISBN: 0-7695-1951-2
ASCII Text
x 
 
Yuki Yamagata, Kenichi Ichino, Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki, Masayuki Sato, Hiroyuki Itabashi, Takashi Murai, Nobuyuki Otsuka, "Implementation of Memory Tester Consisting of SRAM-Based Reconfigurable Cells," Asian Test Symposium, pp. 28, 12th Asian Test Symposium (ATS'03), 2003.
 
 
BibTex
x
 
@article{ 10.1109/ATS.2003.1250778,
author = {Yuki Yamagata and Kenichi Ichino and Masayuki Arai and Satoshi Fukumoto and Kazuhiko Iwasaki and Masayuki Sato and Hiroyuki Itabashi and Takashi Murai and Nobuyuki Otsuka},
title = {Implementation of Memory Tester Consisting of SRAM-Based Reconfigurable Cells},
journal ={Asian Test Symposium},
volume = {0},
year = {2003},
issn = {1081-7735},
pages = {28},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2003.1250778},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asian Test Symposium
TI - Implementation of Memory Tester Consisting of SRAM-Based Reconfigurable Cells
SN - 1081-7735
SP
EP
A1 - Yuki Yamagata,
A1 - Kenichi Ichino,
A1 - Masayuki Arai,
A1 - Satoshi Fukumoto,
A1 - Kazuhiko Iwasaki,
A1 - Masayuki Sato,
A1 - Hiroyuki Itabashi,
A1 - Takashi Murai,
A1 - Nobuyuki Otsuka,
PY - 2003
KW - SRAM test
KW - SRAM-based reconfigurable cell
KW - memory tester
KW - marching test
VL - 0
JA - Asian Test Symposium
ER -
 
Yuki Yamagata, Tokyo Metropolitan University
Kenichi Ichino, Tokyo Metropolitan University
Masayuki Arai, Tokyo Metropolitan University
Satoshi Fukumoto, Tokyo Metropolitan University
Kazuhiko Iwasaki, Tokyo Metropolitan University
Masayuki Sato, INNOTECH Corp.
Hiroyuki Itabashi, INNOTECH Corp.
Takashi Murai, INNOTECH Corp.
Nobuyuki Otsuka, INNOTECH Corp.
A scheme for testing SRAMs is proposed with a tester circuit consisting of SRAM-based reconfigurable cells. We first show an approach to reduce the number of reconfigurable cells required for the tester circuit. We then propose a tester for a 4-Mbit SRAM with reconfigurable cells of 16-bit data SRAMs. We also report the implementation of the proposed circuit. Four 16-bit reconfigurable cells, each of which consists of an SRAM and two CPLDs, were implemented, and mounted on a board. We confirmed that the tester functions correctly by performing a marching test.
Index Terms:
SRAM test, SRAM-based reconfigurable cell, memory tester, marching test
Citation:
Yuki Yamagata, Kenichi Ichino, Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki, Masayuki Sato, Hiroyuki Itabashi, Takashi Murai, Nobuyuki Otsuka, "Implementation of Memory Tester Consisting of SRAM-Based Reconfigurable Cells," ats, pp.28, 12th Asian Test Symposium (ATS'03), 2003
Usage of this product signifies your acceptance of the Terms of Use.