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11th Asian Test Symposium (ATS'02)
Time Slot Specification Based Approach to Analog Fault Diagnosis Using Built-in Current Sensors and Test Point Insertion
Guam, USA
November 18-November 20
ISBN: 0-7695-1825-7
Shambhu Upadhyaya, State University of New York at Buffalo
Jae Min Lee, State University of New York at Buffalo
Padmanabhan Nair, State University of New York at Buffalo
Testing and diagnosis of analog circuits continues to be a hard task for test engineers and efficient test methodologies to tackle these problems are needed. This paper proposes a novel analog test method using time slot specification (TSS) based built-in current sensor. A technique for location of a fault site and fault type based on TSS is presented. The proposed built-in current sense and decision module (BSDM) in association with TSS analysis has high testability and good fault coverage, and a capability to diagnose catastrophic faults and parametric faults in analog circuits. The digital output of BSDM can be easily combined with built-in digital test modules for mixed-signal IC testing. The general heuristics for test point placements are also described.
Citation:
Shambhu Upadhyaya, Jae Min Lee, Padmanabhan Nair, "Time Slot Specification Based Approach to Analog Fault Diagnosis Using Built-in Current Sensors and Test Point Insertion," ats, pp.429, 11th Asian Test Symposium (ATS'02), 2002
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