Hereafter, we present the last improvements for a new approach 1 dealing to cope with noise that troubles speech recognition systems (SRS). This approach performs online monitoring and is oriented to HW redundancy (it is essentially a modification of the classic Recovery Blocks Scheme). When compared to conventional approaches using Fast Fourier Transform (FFT) and Hamming Code, the primary benefit of such a technique is to improve system performance when operating in real (i.e., noisy) environments. The second advantage is related to the considerably low complexity and reduced area overhead required for implementation. We implemented three full versions of the proposed algorithm: one running of a PC microcomputer, and a second one slightly modified to run on a TMS-320C67 Texas DSP microprocessor module. Both of them were described in the C language. A last implementation was prototyped on a HW-SW development environment based on the same Texas microprocessor and on the FLEX10K20 FPGA Altera Component.Keywords: Digital Signal Processing (DSP); Speech-Recognition Systems (SRS); Noise Immunity; On-Line Testing; Recovery Blocks Scheme; Performance Degradation.