11th Asian Test Symposium (ATS'02) Fault Set Partition for Efficient Width Compression Guam, USA November 18-November 20 ISBN: 0-7695-1825-7
In this paper, we present a technique for reducing test length of counter-based pseudo-exhaustive built-self-testing (BIST) using width compression method divide-and-conquer strategy. More formally, the faults are divided into K groups such that a binary counter can generate a test set for each group. selecting the size of the binary counter, this technique allows a trade-off between test application time and overhead. The experimental results for the ISCAS?85 ISCAS?89 benchmark circuits demonstrate the efficiency of the proposed technique. In all cases, this low-overhead BIST technique achieves complete fault coverage of stuck-at faults in reasonable test application time.
Citation:
Emil Gizdarski, Hideo Fujiwara, "Fault Set Partition for Efficient Width Compression," ats, pp.194, 11th Asian Test Symposium (ATS'02), 2002 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||