Tetsuji Kishi, Mitsuyasu Ohta, Takashi Taniguchi, Hiroshi Kadota, "A New Inter-Core Built-In-Self-Test Circuits for Tri-State Buffers in the System on a Chip," Asian Test Symposium, pp. 462, 10th Asian Test Symposium (ATS'01), 2001.

@article{ 10.1109/ATS.2001.990332,
author = {Tetsuji Kishi and Mitsuyasu Ohta and Takashi Taniguchi and Hiroshi Kadota},
title = {A New Inter-Core Built-In-Self-Test Circuits for Tri-State Buffers in the System on a Chip},
journal ={Asian Test Symposium},
volume = {0},
year = {2001},
isbn = {0-7695-1378-6},
pages = {462},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2001.990332},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Asian Test Symposium
TI - A New Inter-Core Built-In-Self-Test Circuits for Tri-State Buffers in the System on a Chip
SN - 0-7695-1378-6
SP
EP
A1 - Tetsuji Kishi,
A1 - Mitsuyasu Ohta,
A1 - Takashi Taniguchi,
A1 - Hiroshi Kadota,
PY - 2001
VL - 0
JA - Asian Test Symposium
ER -