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10th Asian Test Symposium (ATS'01)
Yield Increase of VLSI after Redundancy-Repairing
Kyoto, Japan
November 19-November 21
ISBN: 0-7695-1378-6
Junichi Hirase, Matsushita Electric Industrial Co., Ltd.

A topic of great concern in VSLI manufacture is yield. One way to improve practical yield is to design redundant memory or logic circuits and switch over to this redundant circuit if fault occurs in the principle memory or main logic circuit.

This paper reports the repairing ratio of no good devices on the main circuit and how large of a redundancy-repairing circuit would be economically feasible.

Citation:
Junichi Hirase, "Yield Increase of VLSI after Redundancy-Repairing," ats, pp.353, 10th Asian Test Symposium (ATS'01), 2001
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