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10th Asian Test Symposium (ATS'01)
A SmartBIST Variant with Guaranteed Encoding
Kyoto, Japan
November 19-November 21
ISBN: 0-7695-1378-6
Bernd Koenemann, IBM Microelectronics
Carl Barnhart, IBM Microelectronics
Brion Keller, IBM Microelectronics
Tom Snethen, IBM Microelectronics
Owen Farnsworth, IBM Microelectronics
Donald Wheater, IBM Microelectronics
SmartBIST is a name for a family of streaming scan test pattern decoders that are suitable for on-chip integration. The Automatic Test Pattern Generation (ATPG) algorithms are modified to generate scan test stimulus vectors in a highly compacted source format that is compatible with the SmartBIST decoder hardware. The compacted stimulus vectors are streamed from Automatic Test Equipment (ATE) to the decoder which expands the data stream in real-time into fully expanded scan test vectors. SmartBIST encoding and decoding use simple algebraic techniques similar to those used for LFSR-Coding (also known as LFSR-Reseeding). The specific SmartBIST implementation shown in this paper guarantees that all test cubes can be successfully encoded by the modified ATPG algorithm irrespective of the number and position of the care bits.
Citation:
Bernd Koenemann, Carl Barnhart, Brion Keller, Tom Snethen, Owen Farnsworth, Donald Wheater, "A SmartBIST Variant with Guaranteed Encoding," ats, pp.325, 10th Asian Test Symposium (ATS'01), 2001
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