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10th Asian Test Symposium (ATS'01)
Test Generation for Double Stuck-at Faults
Kyoto, Japan
November 19-November 21
ISBN: 0-7695-1378-6
ASCII Text
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Yoshinobu Higami, Naoko Takahashi, Yuzo Takamatsu, "Test Generation for Double Stuck-at Faults," Asian Test Symposium, pp. 71, 10th Asian Test Symposium (ATS'01), 2001.
 
 
BibTex
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@article{ 10.1109/ATS.2001.990261,
author = {Yoshinobu Higami and Naoko Takahashi and Yuzo Takamatsu},
title = {Test Generation for Double Stuck-at Faults},
journal ={Asian Test Symposium},
volume = {0},
year = {2001},
isbn = {0-7695-1378-6},
pages = {71},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2001.990261},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asian Test Symposium
TI - Test Generation for Double Stuck-at Faults
SN - 0-7695-1378-6
SP
EP
A1 - Yoshinobu Higami,
A1 - Naoko Takahashi,
A1 - Yuzo Takamatsu,
PY - 2001
VL - 0
JA - Asian Test Symposium
ER -
 
Yoshinobu Higami, Ehime University
Naoko Takahashi, Ehime University
Yuzo Takamatsu, Ehime University
In this paper, we propose a test generation method for double stuck-at faults. The proposed method consists of main three parts,
  • 1) Fault simulation with the application of test patterns generated for single stuck-at faults
  • 2) Identification of undetectable faults
  • 3) Test generation using a test generator for single stuck-at faults.
    • The effectiveness of the proposed method is shown by experimental results for ISCAS?85 benchmark circuits.
    Citation:
    Yoshinobu Higami, Naoko Takahashi, Yuzo Takamatsu, "Test Generation for Double Stuck-at Faults," ats, pp.71, 10th Asian Test Symposium (ATS'01), 2001
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