loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
10th Asian Test Symposium (ATS'01)
A Memory Specific Notation for Fault Modeling
Kyoto, Japan
November 19-November 21
ISBN: 0-7695-1378-6
Zaid Al-Ars, Delft University of Technology
Ad J. van de Goor, Delft University of Technology
Jens Braun, Infineon Technologies AG
Detlev Richter, Infineon Technologies AG
This paper shows the shortcomings of the current, generic notation for fault models and extends it to allow for describing fault models for DRAMs.The advantage is that the extended fault models can easily be translated into operation sequences and tests that detect the described fault. Examples are given to show that the new notation results in optimized, memory specific, tests that have a shorter run time for a given fault coverage.
Index Terms:
functional fault models, fault primitives, memory testing, DRAM, memory specific fault analysis
Citation:
Zaid Al-Ars, Ad J. van de Goor, Jens Braun, Detlev Richter, "A Memory Specific Notation for Fault Modeling," ats, pp.43, 10th Asian Test Symposium (ATS'01), 2001
Usage of this product signifies your acceptance of the Terms of Use.