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10th Asian Test Symposium (ATS'01)
Detecting Unique Faults in Multi-port SRAMs
Kyoto, Japan
November 19-November 21
ISBN: 0-7695-1378-6
ASCII Text
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Said Hamdioui, Ad J. van de Goor, David Eastwick, Mike Rodgers, "Detecting Unique Faults in Multi-port SRAMs," Asian Test Symposium, pp. 37, 10th Asian Test Symposium (ATS'01), 2001.
 
 
BibTex
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@article{ 10.1109/ATS.2001.990256,
author = {Said Hamdioui and Ad J. van de Goor and David Eastwick and Mike Rodgers},
title = {Detecting Unique Faults in Multi-port SRAMs},
journal ={Asian Test Symposium},
volume = {0},
year = {2001},
isbn = {0-7695-1378-6},
pages = {37},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2001.990256},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asian Test Symposium
TI - Detecting Unique Faults in Multi-port SRAMs
SN - 0-7695-1378-6
SP
EP
A1 - Said Hamdioui,
A1 - Ad J. van de Goor,
A1 - David Eastwick,
A1 - Mike Rodgers,
PY - 2001
VL - 0
JA - Asian Test Symposium
ER -
 
Said Hamdioui, Intel Corporation and Delft University of Technology
Ad J. van de Goor, Delft University of Technology
David Eastwick, Intel Corporation
Mike Rodgers, Intel Corporation
This paper begins with a brief overview of realistic fault models for multi-port SRAMs with p ports, divided into p classes: single-port faults, two-port faults,..., p-port faults. Except for single-port faults, all other fault classes cannot be detected with the conventional (single-port) memory tests; they require special tests. Next, the paper presents a set of three linear single-addressing tests for unique multi-port memory faults (p >2) that will be merged into a single test.
Citation:
Said Hamdioui, Ad J. van de Goor, David Eastwick, Mike Rodgers, "Detecting Unique Faults in Multi-port SRAMs," ats, pp.37, 10th Asian Test Symposium (ATS'01), 2001
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