A high-speed IDDQ sensor implementation

A
ATS
2000
Ninth Asian Test Symposium (ATS'00)
Abstract - A high-speed IDDQ sensor implementation

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	Similar Articles Articles by Y. Antonioli Articles by T. Inufushi Articles by S. Nishikawa Articles by K. Kinoshita

Ninth Asian Test Symposium (ATS'00)

Taipei, Taiwan

December 04-December 06

ISBN: 0-7695-0887-1

	ASCII Text	x
	Y. Antonioli, T. Inufushi, S. Nishikawa, K. Kinoshita, "A high-speed IDDQ sensor implementation," Asian Test Symposium, pp. 356, Ninth Asian Test Symposium (ATS'00), 2000.

	BibTex	x
	@article{ 10.1109/ATS.2000.893649, author = {Y. Antonioli and T. Inufushi and S. Nishikawa and K. Kinoshita}, title = {A high-speed IDDQ sensor implementation}, journal ={Asian Test Symposium}, volume = {0}, year = {2000}, issn = {1081-7735}, pages = {356}, doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2000.893649}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asian Test Symposium TI - A high-speed IDDQ sensor implementation SN - 1081-7735 SP EP A1 - Y. Antonioli, A1 - T. Inufushi, A1 - S. Nishikawa, A1 - K. Kinoshita, PY - 2000 KW - integrated circuit testing; electric sensing devices; electric current measurement; circuit feedback; CMOS digital integrated circuits; high-speed IDDQ sensor implementation; submicron CMOS process; feedback scheme; floppy-disk controller IDDQ test; current sensor; BICS; built-in sensor; 0.35 micron; 50 MHz VL - 0 JA - Asian Test Symposium ER -

Y. Antonioli, Test Eng. Center, Sharp Corp., Nara, Japan

T. Inufushi, Test Eng. Center, Sharp Corp., Nara, Japan

S. Nishikawa, Test Eng. Center, Sharp Corp., Nara, Japan

K. Kinoshita, Test Eng. Center, Sharp Corp., Nara, Japan

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2000.893649

This paper presents an effective IDDQ sensor design implemented using a 0.35 /spl mu/m process. A straightforward feedback scheme minimizes the effect of process variations. Independent structures permit one to monitor the basic characteristics of the IDDQ sensor, i.e., resolution and speed, and to carry out a 20k-gate floppy-disk controller IDDQ test separately. Simulation and test results show accuracy better than /spl plusmn/10 /spl mu/A at 50 MHz in a 1 mA IDDQ measurement range.

Index Terms:

integrated circuit testing; electric sensing devices; electric current measurement; circuit feedback; CMOS digital integrated circuits; high-speed IDDQ sensor implementation; submicron CMOS process; feedback scheme; floppy-disk controller IDDQ test; current sensor; BICS; built-in sensor; 0.35 micron; 50 MHz

Citation:

Y. Antonioli, T. Inufushi, S. Nishikawa, K. Kinoshita, "A high-speed IDDQ sensor implementation," ats, pp.356, Ninth Asian Test Symposium (ATS'00), 2000

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