On the superiority of DO-RE-ME/MPG-D over stuck-at-based defective part level prediction

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	Similar Articles Articles by J. Dworak Articles by M.R. Grimaila Articles by B. Cobb Articles by T.-C. Wang Articles by L.-C. Wang Articles by M.R. Mercer

Ninth Asian Test Symposium (ATS'00)

Taipei, Taiwan

December 04-December 06

ISBN: 0-7695-0887-1

	ASCII Text	x
	J. Dworak, M.R. Grimaila, B. Cobb, T.-C. Wang, L.-C. Wang, M.R. Mercer, "On the superiority of DO-RE-ME/MPG-D over stuck-at-based defective part level prediction," Asian Test Symposium, pp. 151, Ninth Asian Test Symposium (ATS'00), 2000.

	BibTex	x
	@article{ 10.1109/ATS.2000.893618, author = {J. Dworak and M.R. Grimaila and B. Cobb and T.-C. Wang and L.-C. Wang and M.R. Mercer}, title = {On the superiority of DO-RE-ME/MPG-D over stuck-at-based defective part level prediction}, journal ={Asian Test Symposium}, volume = {0}, year = {2000}, issn = {1081-7735}, pages = {151}, doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2000.893618}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asian Test Symposium TI - On the superiority of DO-RE-ME/MPG-D over stuck-at-based defective part level prediction SN - 1081-7735 SP EP A1 - J. Dworak, A1 - M.R. Grimaila, A1 - B. Cobb, A1 - T.-C. Wang, A1 - L.-C. Wang, A1 - M.R. Mercer, PY - 2000 KW - circuit simulation; integrated logic circuits; integrated circuit testing; automatic test pattern generation; fault simulation; DO-RE-ME technique; MPG-D model; ATPG; defective part level prediction; benchmark circuit simulations; stuck-at fault detection tests; bridging surrogate detection; correlation coefficient; stuck-at fault coverage; logic circuit; predictor accuracy; industrial circuit; test pattern sequences VL - 0 JA - Asian Test Symposium ER -

J. Dworak, Comput. Eng. Group, Texas A&M Univ., College Station, TX, USA

M.R. Grimaila, Comput. Eng. Group, Texas A&M Univ., College Station, TX, USA

B. Cobb, Comput. Eng. Group, Texas A&M Univ., College Station, TX, USA

T.-C. Wang, Comput. Eng. Group, Texas A&M Univ., College Station, TX, USA

L.-C. Wang, Comput. Eng. Group, Texas A&M Univ., College Station, TX, USA

M.R. Mercer, Comput. Eng. Group, Texas A&M Univ., College Station, TX, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2000.893618

Uses data collected from benchmark circuit simulations to examine the relationship between the tests which detect stuck-at faults and those which detect bridging surrogates. We show that the coefficient of correlation between these tests approaches zero as the stuck-at fault coverage approaches 100%. An enhanced version of the MPG-D model, which is based upon the number of detections of each site in a logic circuit, is shown to be superior to stuck-at fault coverage-based defective part level prediction. We then compare the accuracy of both predictors for an industrial circuit tested using two different test pattern sequences.

Index Terms:

circuit simulation; integrated logic circuits; integrated circuit testing; automatic test pattern generation; fault simulation; DO-RE-ME technique; MPG-D model; ATPG; defective part level prediction; benchmark circuit simulations; stuck-at fault detection tests; bridging surrogate detection; correlation coefficient; stuck-at fault coverage; logic circuit; predictor accuracy; industrial circuit; test pattern sequences

Citation:

J. Dworak, M.R. Grimaila, B. Cobb, T.-C. Wang, L.-C. Wang, M.R. Mercer, "On the superiority of DO-RE-ME/MPG-D over stuck-at-based defective part level prediction," ats, pp.151, Ninth Asian Test Symposium (ATS'00), 2000

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